2021 01 09 High Performance Computer Architecture 1 The Risc Assembly Refresher bcc73bec4b8e

2021 01 10 High Performance Computer Architecture 2 The C Refresher 491f72a67495

2021 01 14 High Performance Computer Architecture 3 Introduction to the Computer Architecture Moore s Law 625a70bb0caf

2021 01 15 High Performance Computer Architecture 4 Metrics and Evaluation of Performance Iron Law 1812e901dc63

2021 01 17 High Performance Computer Architecture 5 Set Up the Virtual Machine and Simulator Report 7fa9ababc92b

2021 01 19 High Performance Computer Architecture 6 Basis of Pipelining Pipeline Dependencies and Hazards 3953efd53be

2021 01 20 High Performance Computer Architecture 7 Branch Prediction Part 1 943d454cecb9

2021 01 21 High Performance Computer Architecture 8 Branch Prediction Part 2 9d44401b26de

2021 01 21 High Performance Computer Architecture 9 Branch Prediction Part 3 6e120f0dd4d8

2021 01 22 High Performance Computer Architecture 10 Predication If Conversion Condition Move and Full 31464a3fc0e2

2021 01 22 High Performance Computer Architecture 11 Experiment for Control Dependencies a98f393674c

2021 01 27 High Performance Computer Architecture 12 Data Dependency Problems Register Renaming and 925b33a5435b

2021 01 28 High Performance Computer Architecture 13 Tomasulo s Algorithm Part 1 8c65788dec07

2021 01 28 High Performance Computer Architecture 14 Tomasulo s Algorithm Part 2 96c38d0473e3

2021 02 02 High Performance Computer Architecture 15 Exceptions for Tomasulo s Algorithm and Reorder 2fc883d89d32

2021 02 02 High Performance Computer Architecture 16 Unified Reservation Stations Weakest Link 7dd6e833cece

2021 02 17 High Performance Computer Architecture 17 Experiment for Branch Prediction a375fb718536

2021 02 19 High Performance Computer Architecture 18 Memory Ordering d7fcf752aa63

2021 02 21 High Performance Computer Architecture 19 Compiler for Improving ILP Tree Height Reduction 4ada4103d326

2021 02 22 High Performance Computer Architecture 20 VLIW and Explicitly Parallel Processors 35f02ab9495c

2021 02 25 High Performance Computer Architecture 21 Midterm Review 19748900b111

2021 03 10 High Performance Computer Architecture 22 Locality Principle Cache Types of Caches LRU and a264e7c73e8f

2021 03 11 High Performance Computer Architecture 23 Virtual Memory Virtual to Physical Translation Page aa7648477f70

2021 03 13 High Performance Computer Architecture 24 Cache Performance VIPT Cache Aliasing Way dff8f03bbff6

2021 03 15 High Performance Computer Architecture 25 Cache Experiment e4d50f24d217

2021 04 01 High Performance Computer Architecture 26 An Introduction to Memory DRAM SRAM 18647b73f8b2

2021 04 02 High Performance Computer Architecture 27 Introduction to Storage Magnetic Disks Optical Disks e4d9499d1ab0

2021 04 04 High Performance Computer Architecture 28 Introduction to Fault Tolerance Memory and Storage f1cf47e6dcf9

2021 04 05 High Performance Computer Architecture 29 Introduction to Multi Processing and Multi Threading 4484c22fa1b1

2021 04 07 High Performance Computer Architecture 30 Introduction to Cache Coherence Coherence Protocols 259a225572a3

2021 04 08 High Performance Computer Architecture 31 The Introduction of Synchronization Atomic Exchange 5286132300f9

2021 04 09 High Performance Computer Architecture 32 Memory Inconsistency Sequential Consistency Relaxed e3fcb4aff804

2021 04 09 High Performance Computer Architecture 33 Many Core Challenges and Solutions b8b3e94260b0

2021 04 18 High Performance Computer Architecture 34 Cache Coherence and Multicore Experiments d8c9997fbba5

2021 04 30 High Performance Computer Architecture 35 Final Review 2350dee247c3